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武汉大学学报 英文版 | Wuhan University Journal of Natural Sciences
Wan Fang
CNKI
CSCD
Wuhan University
Latest Article
Effects of Dummy Thermal Vias on Interconnect Delay and Power Dissipation of Very Large Scale Integration Circuits
Time:2018-9-18  
XU Peng, PAN Zhongliang
School of Physics and Telecommunications Engineering, South China Normal University, Guangzhou 510006, Guangdong, China
Abstract:
The interconnect temperature of very large scale integration (VLSI) circuits keeps rising due to self-heating and substrate temperature, which can increase the delay and power dissipation of interconnect wires. The thermal vias are regarded as a promising method to improve the temperature performance of VLSI circuits. In this paper, the extra thermal vias were used to decrease the delay and power dissipation of interconnect wires of VLSI circuits. Two analytical models were presented for interconnect temperature, delay and power dissipation with adding extra dummy thermal vias. The influence of the number of thermal vias on the delay and power dissipation of interconnect wires was analyzed and the optimal via separation distance was investigated. The experimental results show that the adding extra dummy thermal vias can reduce the interconnect average temperature, maximum temperature, delay and power dissipation. Moreover, this method is also suitable for clock signal wires with a large root mean square current. 
Key words:very large scale integration (VLSI) circuits; interconnect temperature; interconnect delay; thermal vias; interconnect power dissipation
CLC number:TN 47
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